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→Interfacing a Processor
* [https://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus Serial Peripheral Interface (SPI):] It is a synchronous, [https://en.wikipedia.org/wiki/Duplex_(telecommunications)#Full_duplex full duplex] serial communication interface specification. It communicates using master-slave structure. Multiple slave devices are supported through selection with individual slave select(SS) lines.
* [https://en.wikipedia.org/wiki/I%C2%B2C I2C:] The I2C bus uses a bi-directional Serial Clock Line (SCL) and Serial Data Lines (SDL) and due to its two-wire nature can only communicate [https://en.wikipedia.org/wiki/Duplex_(telecommunications)#Half_duplex half-duplex]. It is a multi-master, multi-slave, packet switched, single ended serial computer bus. Data and clock are sent from master.
* [https://en.wikipedia.org/wiki/CAN_bus Controller Area Network (CAN):] The CAN bus is a balanced (differential) two-wire interface. This bus use [https://en.wikipedia.org/wiki/Non-return-to-zero NRZ encoding ] to ensure compact messages with a minimum number of transition and high resilience to external disturbance.
* [https://en.wikipedia.org/wiki/SpaceWire SpaceWire:] The Spacewire bus provides a bidirectional serial interconnect which builds a scalable parallel system using a pair of unidirectional lines. IEEE 1355 defines the Physical and Data Link Layer. The electrical interface is specified as standard Transistor-Transistor Logic (TTL).
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